Business Wire

SpringSoft’s Verdi Debug Software Expands Verification Interoperability with Comprehensive UVM Support

HSINCHU, Taiwan--(BUSINESS WIRE)--SpringSoft, Inc., a global supplier of specialized IC design software, today announced comprehensive support for the Universal Verification Methodology (UVM) with its ...
Design-Reuse

SpringSoft Introduces Structured Method for SystemVerilog Testbench Debug and Analysis

Hsinchu, Taiwan, May 18, 2009 - SpringSoft, Inc. (TAIEX: 2473), a global supplier of specialized IC design software, today announced comprehensive SystemVerilog Testbench (SVTB) debug support with the ...
Semiconductor Engineering

Simulation: Balancing Speed And Debug

There’s an old saying about simulation: “It’s all about the need for speed.” Simulation is the core technology for functional verification of semiconductors, and the demand for higher runtime ...
EDN

SpringSoft turns the power of Verdi on SystemVerilog test benches

SystemVerilog was supposed to be such a boon to verification engineers. By providing a Verilog-like language with extensions that made it easy to write transactors, assertions, and checkers, the ...
Semiconductor Engineering

Intelligent Waveform Replay For Efficient Debug

There is no doubt that design reuse is essential for today’s massive system on chip (SoC) projects. No team, no matter how large or how talented, can design billions of gates from scratch for each new ...